Every oversampled converter in the world — phone, studio, instrument — descends from delta-sigma modulation. DS-C is an alternative to it, not a replacement for it: same job, approached as what conversion physically is — a tracking problem, with a stability proof rather than a stability margin.
R&D → prototype Patent pending — provisional in preparation
A conventional delta-sigma modulator does not remove quantisation error. It relocates it, pushing noise out of the signal band by shaping a transfer function around the quantiser. The mechanism works, it built the industry, and in idealised simulation it performs superbly. Nothing here is an argument that it should be abandoned.
But a one-bit quantiser is a hard nonlinearity, and the loop wrapped around it has no closed-form stability theory. In practice, stability is established by simulation sweeps and empirical out-of-band gain limits, then defended with margin. That is why high-resolution parts so often escape to multi-bit quantisers — which then need element matching and trimming to stay linear.
Frame it that way and the difference between input and output is a tracking error to be regulated, not noise to be moved. The loop filter is then no longer a noise transfer function: it is a signal-band filter that defines where the comparison between input and output matters. Between it and the quantiser sits a nonlinear controller that actively drives the conversion error toward zero rather than relocating it in frequency.
And because the result is a control loop, its stability is established the way control loops establish stability — by Lyapunov argument, as a proof, not by sweeping the parameter space and hoping.
The same three elements, doing different jobs. In DS-C the filter defines a comparison band rather than a noise shape, and the controller between it and the quantiser is the element conventional modulators do not have.
A Lyapunov argument, not an empirical margin. The stability case does not depend on the input amplitude happening to stay where the sweeps were run.
The headline in §04: in simulated build trials DS-C survives 5 % components where the conventional modulator does not. If it holds on hardware, that is a bill-of-materials cost rather than an abstraction.
Displace every internal state by twice its normal operating swing and the loop comes back. A converter does not always start from rest.
Not a claim that our floor is lower — a claim about what it is. A delta-sigma must have a noise transfer function, that function must have zeros, and those zeros show up as determinate notches. DS-C has none, because it is not shaping noise. See §05.
No element matching, no trimming, no multi-bit DAC linearity problem — and the output is directly compatible with DSD.
The same modulator serves as an analogue-to-digital front end or, in the digital domain, as a digital-to-analogue modulator.
Both architectures were realised in simulation at 7th order, one bit, 256× oversampling and abused two ways. Identical treatment throughout — same simulation engine, same perturbation model, same tolerance grid, same trial count, same failure criterion — applied to each design's own component set. These are simulated component sets, not boards.
| Component tolerance | DS-C | ΔΣ mild | ΔΣ aggressive |
|---|---|---|---|
| 1 % — precision parts | 0 % | 0 % | 0 % |
| 5 % — ordinary parts | 0 % | 29 % | 29 % |
| 10 % | 12 % | 79 % | 79 % |
| 20 % | 75 % | 92 % | 96 % |
The 5 % row is the commercially decisive one. 5 % is a jellybean part; 1 % is a precision part at several times the price. The conventional modulator needs better than 5 % tolerance, or a calibration step to compensate. Ours needs neither.
DS-C's median performance is untouched through 10 % — it drifts under a decibel either way — but a small tail of surviving builds degrades badly, the worst case at 5 % losing 122 dB while still technically running. A production design would have to screen for that.
| Initial state displacement | DS-C |
|---|---|
| 0.25 × operating swing | 0 % fail |
| 0.5 × | 0 % fail |
| 1.0 × | 0 % fail |
| 2.0 × — twice full swing | 0 % fail |
| Conventional ΔΣ, displaced only 0.33×, and at a low input level rather than a demanding one | 19–25 % fail |
This page is theoretical. No DS-C hardware exists yet and nothing here has been measured. Every figure comes from simulation, and both architectures are simulated the same way, so the comparison is like for like.
We deliberately do not quote a predicted thermal-noise floor for our own design. Setting an estimated analogue noise limit for DS-C beside an idealised simulation figure for delta-sigma would compare two different things and handicap only one of them. When there are boards and an analyser, measured numbers go up for whatever we can measure — including if they are worse than these.
Every figure below is peak SQNR — quantisation-limited, in simulation, at maximum input level. These are not dynamic-range figures and must not be read as such. For scale, CD audio is a 16-bit format, which is about 98 dB of theoretical SQNR.
| Design | Path | Peak SQNR | ENOB |
|---|---|---|---|
| DS-C — design of record, buildable in analogue | ADC | 167.5 dB | 27.5 |
| DS-C — high-performance variant, banked for the DAC | DAC — digital domain | 184.5 dB | 30.4 |
| — the same variant, dithered | DAC | 186.8 dB | 30.7 |
| Conventional ΔΣ, matched opponent | ADC, continuous-time | 176.0 dB | 29.0 |
We quote ENOB to one decimal rather than a round bit count, because the rounding is where this kind of number usually goes wrong. The DAC variant is 30.4 bits undithered and 30.7 dithered — near enough to 31 that the temptation is obvious, and far enough that we will not write it.
The two modulator rows differ because the analogue realisation has to be buildable. The unconstrained design buys its extra decibels with a component spread no thin-film process would hold — which is fatal for a continuous-time ADC and irrelevant for a DAC modulator, where the loop runs in the digital domain and there are no resistors to mismatch.
Not on the raw number. Run under identical conditions — same simulation engine, same solver, same latched comparator, same record length — a conventional continuous-time delta-sigma of the same order and oversampling reaches 176.0 dB peak SQNR — above our own buildable design. In idealised simulation it is a strong architecture and we will not pretend otherwise.
What it does not do is survive. That same modulator diverges outright when pushed past its peak — that peak is the last input level at which it works, not a point inside a working range — and its yield collapses under exactly the perturbations §04 applies. The argument for DS-C is not that the ceiling is higher. It is that the floor is, once the design has to be built out of real parts and started from an arbitrary state.
This is not a performance claim, and it is the most interesting thing on this page. A delta-sigma modulator must have a noise transfer function. That function must have zeros. Those zeros are determinate — they sit at frequencies the designer chose — and they appear in the output spectrum as narrow, deep notches.
Searching both spectra for narrow dips below the local trend, at a 222-point record resolved finely enough to see them:
| Deepest structural dips | Depth | On a design NTF zero? |
|---|---|---|
| Conventional ΔΣ — 21,022 Hz | 39.6 dB | Yes — within 1 Hz of the design value |
| Conventional ΔΣ — 8,963 Hz | 13.0 dB | Yes — 40 Hz off |
| DS-C — four dips, scattered | 11.6–14.1 dB | None — periodogram scatter, not structure |
A delta-sigma cannot hide its zeros, because having them is what makes it a delta-sigma. DS-C shows none, because it is not shaping noise — there is no transfer function whose nulls could appear. That is objective evidence of a different architecture rather than a variation on the usual one, and it matters for the patent as much as for the pitch.
We are not claiming our floor is better on this basis. Both floors sit far below anything thermal noise would let a real converter reach, and an earlier argument that a flatter floor makes tones more evenly audible was measured, found to be roughly 49 dB of swing across the band, and then dropped as practically irrelevant. This is a claim about identity, not about quality.
The beachhead. Recording, mastering, and high-end playback, where one-bit linearity with no element matching is an audible argument and DSD compatibility is free.
Precision measurement, where linearity and start-up behaviour matter more than cost, and a stability proof is worth having on paper.
Tolerance to ordinary components is a die-cost argument in volume. The natural consumer route is through a licensee rather than our own silicon.
DS-C grows out of original work in nonlinear control, published in peer-reviewed venues before it was ever pointed at audio.
A provisional patent application covering the architecture is in preparation. Implementation detail — the control law, the filter-design procedure, and everything at component level — is held back, and this page is written accordingly.
Happy to go deeper than this page does — under NDA where the subject calls for it.
takis.zourntos@emads.org